I bought an MC6800 on eBay thinking it would be interesting to look closely at a vintage CPU. The free shipping from Hong Kong to Canada took ~70 days and had forgotten about it when it did finally arrive. I am a bit puzzled by what I actually purchased
This was the eBay image of the chip
And this is the chip I received.
It is labeled MC6800P but it has the Freescale logo rather than Motorola logo showing on the eBay image. Motorola Semiconductors became Freescale in 2004, making this chip post 2004. And I don’t know what to make of the date code is that really 1634 (Week 34 2016). I cannot believe Freescale was still making MC6800’s in 2016 (42 years after it was introduced.)
There is a lot written about the Motorola 6800 CPU, first introduced in 1974 (At roughly the same time as Intel 8080). There is even a patent 3987418 that describes the chip and its layout. It was an 8-bit CPU running at 1MHz with at the time the unique feature of requiring only a single 5V voltage supply. It was the first of a number of hugely successful 68 series CPU’s.
It measured 4.5 mm x 4.78 mm (21.5mm2) which is a bit smaller than the original 6800 which purportedly was 29mm2. The overall layout is similar to the layout given in the patent with a few bond pads re-positoned.
But the die marking is HD46800DR
The HD46800DR die mark suggests this is an Hitachi die?! The HD46800 was Hitachi’s version of the MC6800, they were a valid second source for the 6800. There is no Hitachi logo on the die though. So I think I have a 6800 die that was fabricated by Hitachi, in a package with a Freescale logo, and (possibly) a week 34 2016 date code (Package date). It is known that Rochester Electronics was authorized by Freescale in 2014 to manufacture 68 series chips. So my best guess is that Rochester Electronics had a quantity of Hitachi 46800DR wafers, that they packaged and tested, and labelled Freescale MC6800P.
The first image is a single image taken with a 20x objective, the bottom image is a stack of 5 images taken with a 80x objective, focus stacked and the contrast adjusted (Which is why the aluminum and polysilicon look different between the images).
It is clear to me that this has been fabricated with a (relatively) modern equipment set. The Aluminum and polysilicon lines are crisp and edges are straight indicating that the lines have been dry etched (Using reactive ion etching). Back in 1974 when these were first made all the layers would have been wet etched, with Aluminum lines etched in phosphoric acid. The resulting lines would tend to have occasional notches and general line edge roughness. (In those days they processed 50 x 3″ wafers in batches with two cassettes of 25 dunked into a sizable vat of acid).
The 6800 was designed on a 5μm depletion mode NMOS process, which is what I think we have here. What a simple process, with just ~7 masks:-
- Active Area,
- Depletion/Vt adjust implant
- Buried contacts
- Passivation (Bond pads)
The buried contacts (Contact between polysilicon and active regions) is now unusual for CMOS processes (I believe etching the polysilicon without accidentally etching trenches in the exposed silicon around the poly in the contact, was a control problem causing yield loss)
You can see the whole mask set and process sequence in this small test structure.From left to right the first pad has contacts to the active area that has fingers and runs under the 2nd and 3rd pad. You have a polysilicon gate between 1st and 2nd pads. A minimum aluminum finger grossing active area and poly between 2nd and 3rd pads. the 3rd pad has contacts to polyszilicon. And the 4th pad contacts a polysilicon line that makes a buried contact to active area between 3rd and 4th pads.
The instruction decoder is just a simple ROM. What I was not able to find is the voltage doubling circuitry that is used to eliminate the 10V voltage supply, and is discussed in this patent US3942047 (Both patents were granted to John Buchanan who was a primary designer on the 6800). I am thinking that the square metal structures in the buffers may be capacitors used in the voltage doubling circuit, there is a Vss pad centre bottom (And centre top of die) but I cannot identify the full voltage doubling circuit.